The present invention relates to a pattern forming method which permits forming a semiconductor integrated circuit pattern including fine patterns with a high superposing accuracy and with a high through-put.
The photolithography technology used in the manufacture of a semiconductor device facilitates the manufacturing process and lowers the manufacturing cost and, thus, has been widely employed in the manufacture of electronic devices. As a result of technical innovation which continues to be made nowadays, miniaturization of a device has now been achieved to provide a device sized at 0.25 .mu.m or less by the use of a light source of a short wavelength (KrF excimer laser light source). Also, vigorous researches are being made on the use of ArF excimer laser light source having a wavelength shorter than that of the KrF excimer laser light, or on the development of a Revenson type phase shifting mask in an attempt to achieve further miniaturization of the device. These new techniques are expected to provide a mass production lithography tool corresponding to the 0.15 .mu.m rule.
However, various problems must be solved for developing these new techniques, and a long time is required for the development. It is worried about that the speed of development may fail to follow the speed in the miniaturization of the device.
On the other hand, a charged beam lithography, which is considered to be a first candidate of the post-photolithography, has already proved that it is possible to form a pattern sized at 0.01 .mu.m by using a finely drawn beam. This technology is satisfactory in terms of miniaturization of the device, but leaves room for further improvement in terms of the through-put when used as a tool for mass production of the device. To be more specific, fine patterns are depicted one by one in the charged beam lithography, leading to requirement of a long treating time.
A pattern forming method utilizing a charged beam which exhibits a resolution higher than that achieved by light and achieving a through-put substantially equal to that of a light stepper and a lithography system achieving the particular pattern forming method are being developed in recent years. The particular pattern forming method is expected to provide a mass production system adapted for use after the era of the photolithography. In the particular pattern forming method and the lithography system, it is necessary to form a conductive upper film right above a resist film or to form a conductive underlying film right below the resist film in order to prevent the charge accumulation in the step of exposure to the charged beam.
However, if the conductive film is formed right above or below the resist film, it has been clarified that the profile of the resist pattern formed by the light exposure is deteriorated, and that the process allowance is lowered. Particularly, these problems are rendered prominent where a fine pattern smaller than the wavelength of the light used for the light exposure is to be formed.
Also, in this technique, it is necessary to align the pattern of exposure to light with the pattern of exposure to the charged beam. In this case, each of these patterns is aligned with the same mark. In other words, it is unavoidable to employ an indirect alignment. The necessity of employing an indirect alignment in place of a direct alignment is a serious defect because the required accuracy of alignment is made severer to severer in accordance with miniaturization of the pattern size.
The present inventors previously proposed a pattern forming method in which a charged beam is aligned with a latent image formed in advance within a resist film by exposure to light. In this method, a conductive layer is formed above or below a resist film in order to prevent a charge up in the step of exposure to a charged beam, with the result that it is difficult to clearly sense the latent image formed within the resist film. It follows that the S/N ratio of the position information is deteriorated, making it difficult to achieve the required alignment accurately. In other words, it was impossible to align the light exposure pattern within the resist layer with the charged beam pattern while preventing the charge-up problem from taking place in the step of exposure to a charged beam.